1. Field of the Invention
The present invention relates generally to thin film transistors (TFT) and methods of evaluating reliability thereof, and more specifically, to a TFT including a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film, and a method of evaluating reliability thereof.
2. Description of the Background Art
TFTs are used for load transistors in the memory cells of a static random access memory (SRAM) or driver transistors for liquid crystal television pixels. When such products incorporated with TFTs are marketed, the reliability of TFTs should be evaluated.
In FIG. 22, a typical top gate type P channel TFT is illustrated in a schematic cross section. In the TFT, an insulating film 2a is formed on a substrate 1. A polysilicon film 3 is formed on insulating film 2a. Polysilicon film 3 may be replaced with a monocrystalline silicon film or an amorphous silicon film. Source/drain regions 4 and a channel region 5 are included in polysilicon layer 3. A gate electrode 7 is formed on polysilicon layer 3 with a gate insulating film 6 of a silicon oxide film therebetween. Polysilicon layer 3 and gate electrode 7 are covered with a silicon oxide film 2b. An aluminum interconnection 8 is connected to each of source/drain regions 4 through a contact hole provided in silicon oxide film 2b. More specifically, the TFT in FIG. 22 is an MOS (Metal Oxide Semiconductor) type PET (Field Effect Transistor) with polysilicon layer 3 serving as an active region.
For reliability evaluation tests for the TFT as illustrated in FIG. 22, a hot carrier stress test, a breakdown voltage test for gate insulating film 6 or the like have been conducted.
FIG. 23 sets forth one example of a bias condition in such a hot carrier stress test. In this example, source voltage VS applied to source S is 0V, gate voltage VG applied to gate G is xe2x88x927V, drain voltage VD applied to drain D is xe2x88x927V, and current continues to be passed between source S and drain D for a long period of time. It has been established that if polysilicon film 3 is sufficiently hydrogenated, the electrical characteristic of the TFT hardly changes before and after such a hot carrier stress test (see International Reliability Physics Society Proceedings, 1992, pp. 63-67).
In FIG. 24, one example of a breakdown voltage evaluation test for a gate insulating film in a TFT is illustrated. In this example, for VS=VD=0V gate voltage VG is gradually changed from 0V toward negative voltage. At the time, the gate voltage VG at which gate insulating film 6 is broken down is called gate breakdown voltage. When a silicon oxide film as thick as 250 xc3x85 is used for a gate insulating film, the gate breakdown voltage is about 25V. For a power supply voltage of 5V, a gate breakdown voltage of 25V would be enough. The insulation breakdown voltage of a silicon oxide film is generally about 10 MV/cm expressed in electric field, and a breakdown voltage for a gate insulating film having an arbitrary thickness can be estimated from the value of the electric field.
It has been known that in a bulk silicon monocrystalline MOSFET the characteristic of the bulk MOSFET slightly degrades by a xe2x88x92BT (negative bias temperature) stress test by which the gate is supplied with constant voltage VG and maintained at an elevated constant temperature T.
The influence of xe2x88x92BT stress however is not exactly known. TFTs are therefore incorporated in SRAMs and the like and marketed without reliability evaluation by xe2x88x92BT stress tests.
It is therefore an object of the invention to ascertain the influence of xe2x88x92BT stress upon a TFT and establish a method of evaluating reliability concerning the degradation of the characteristic of a TFT due to xe2x88x92BT stress.
Another object of the invention is to provide a TFT satisfying reliability required in a xe2x88x92BT stress state based on thus established method of evaluating the reliability of a TFT due to xe2x88x92BT stress.
A method of evaluating the reliability of a TFT according to a first aspect of the invention, in a TFT having a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film , evaluates the reliability of the TFT in the xe2x88x92BT stress state in which the gate is supplied with an arbitrary negative constant voltage VG and maintained at an arbitrary constant temperature T based on the following expressions:
xcex94Vthxe2x88x9dtxcex1xe2x80x83xe2x80x83(3a)
                              Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          ∝                  exp          ⁢                      xe2x80x83                    ⁢                                                    xe2x80x83                            ⁢                              qd                ⁢                                  "LeftBracketingBar"                                      V                    G                                    "RightBracketingBar"                                                                    2              ⁢                              xe2x80x83                            ⁢                              kTt                ox                                                                        (4a)                                          Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          ∝                  exp          ⁢                      xe2x80x83                    ⁢                      {                                          -                                  q                  kT                                            ⁢                              (                                                      φ                    0                                    -                                                                                    xe2x80x83                                            ⁢                                              d                        ⁢                                                  "LeftBracketingBar"                                                      V                            G                                                    "RightBracketingBar"                                                                                                            2                      ⁢                                              xe2x80x83                                            ⁢                                              t                        ox                                                                                            )                                      }                                              (5a)                                          Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          =                  Δ          ⁢                      xe2x80x83                    ⁢                                                    V                th0                            ⁡                              (                                  t                                      t                    0                                                  )                                      α                    ⁢          exp          ⁢                      {                                          -                                  q                  kT                                            ⁢                              (                                                      φ                    0                                    -                                                                                    xe2x80x83                                            ⁢                                              d                        ⁢                                                  "LeftBracketingBar"                                                      V                            G                                                    "RightBracketingBar"                                                                                                            2                      ⁢                                              xe2x80x83                                            ⁢                                              t                        ox                                                                                            )                                      }                                              (        6        )                                τ        =                                                            t                0                            ⁡                              (                                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                                              th                        ⁢                                                  xe2x80x83                                                ⁢                        τ                                                                                                  Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                      th0                                                                      )                                      β                    ⁢          exp          ⁢                      xe2x80x83                    ⁢                                    β              ⁢                              xe2x80x83                            ⁢              q              ⁢                              xe2x80x83                            ⁢                              φ                0                                      kT                    ⁢                      xe2x80x83                    ⁢                      exp            ⁡                          (                              -                                  xe2x80x83                                ⁢                                                                            xe2x80x83                                        ⁢                                          β                      ⁢                                              xe2x80x83                                            ⁢                      qd                      ⁢                                              "LeftBracketingBar"                                                  V                          G                                                "RightBracketingBar"                                                                                                  2                    ⁢                                          xe2x80x83                                        ⁢                                          kTt                      OX                                                                                  )                                                          (        8        )            
where xcex94Vth represents the threshold voltage shift amount of the TFT, t time, xcex1 time coefficient, q elementary electric charge, d voltage coefficient, k Boltzmann constant, toxthe thickness of the gate oxide film , xcfx860 temperature coefficient, and xcex94Vthxcfx84 tolerant threshold voltage shift amount for the TFT, and xcex2=1/xcex1. The method includes a step of determining time coefficient xcex1 in expression (3a) based on the relation between threshold voltage shift amount xcex94Vth obtained from at least one xe2x88x92BT stress test and time t, a step of determining voltage coefficient d in expression (4) based on the relation between threshold voltage shift amounts xcex94Vth obtained from at least two xe2x88x92BT stress tests and applied different gate voltages VG, a step of determining temperature coefficient xcfx860 in expression (5a) based on the relation between threshold voltage shift amounts xcex94Vth obtained from at least two xe2x88x92BT stress tests and applied different temperatures T, and a step of determining a constant of proportion given as follows using the determined time coefficient xcex1, voltage coefficient d, and temperature coefficient xcfx860 determined in expression (6) obtained from the relation between expression (3a), (4a), and (5a),       Δ    ⁢          xe2x80x83        ⁢                            V          th0                ⁡                  (                      1                          t              0                                )                    α        ≡      C    2  
and is characterized in that the life of a TFT is produced from expression (8) obtained by modifying expression (6) from the determined constant proportion c2 and tolerant threshold voltage shift amount xcex94Vthxcfx84.
A method of evaluating the reliability of a TFT according to a second aspect of the invention, in a TFT having a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film , evaluates the reliability of the TFT in the xe2x88x92BT stress state in which the gate is supplied with an arbitrary constant voltage VG and held at a predetermined constant temperature T based on the following expressions:
xcex94Vthxe2x88x9dtxcex1xe2x80x83xe2x80x83(3a)
                              Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          ∝                  exp          ⁢                      xe2x80x83                    ⁢                                                    xe2x80x83                            ⁢                              qd                ⁢                                  "LeftBracketingBar"                                      V                    G                                    "RightBracketingBar"                                                                    2              ⁢                              xe2x80x83                            ⁢                              kTt                ox                                                                        (4a)                                          Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          =                  Δ          ⁢                      xe2x80x83                    ⁢                                                    V                th0                            ⁡                              (                                  t                                      t                    0                                                  )                                      α                    ⁢          exp          ⁢                                                    xe2x80x83                            ⁢                              qd                ⁢                                  "LeftBracketingBar"                                      V                    G                                    "RightBracketingBar"                                                                    2              ⁢                              xe2x80x83                            ⁢                              kT                0                            ⁢                              t                OX                                                                        (6b)                                τ        =                                                            t                0                            ⁡                              (                                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                                              th                        ⁢                                                  xe2x80x83                                                ⁢                        τ                                                                                                  Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                      th0                                                                      )                                      β                    ⁢          exp          ⁢                      xe2x80x83                    ⁢                      (                          -                              xe2x80x83                            ⁢                                                                    xe2x80x83                                    ⁢                                      β                    ⁢                                          xe2x80x83                                        ⁢                    qd                    ⁢                                          "LeftBracketingBar"                                              V                        G                                            "RightBracketingBar"                                                                                        2                  ⁢                                      xe2x80x83                                    ⁢                                      kTt                    OX                                                                        )                                              (8b)            
where xcex94Vth represents the threshold voltage shift amount of the TFT, t time, xcex1 time coefficient, q elementary electric charge, k Boltzmann constant, tox the thickness of the gate oxide film , xcfx860 temperature coefficient, and xcex94Vthxcfx84 tolerant threshold voltage shift amount for the TFT, and xcex2=1/xcex1. The method includes a step of determining time coefficient xcex1 in expression (3a) based on the relation between threshold voltage shift amount xcex94Vth obtained from at least one xe2x88x92BT stress test and time t,
a step determining a constant of proportion given as follows using the determined time coefficient xcex1 and voltage coefficient d in expression (6b) obtained from the relation between expressions (3a) and (4a),       Δ    ⁢          xe2x80x83        ⁢                            V          th0                ⁡                  (                      1                          t              0                                )                    α        ≡      C    2  
and the method is characterized in that the life of the TFT is produced from expression (8b) obtained by modifying expression (6b) from the determined constant of proportion c2 and tolerant threshold voltage shift amount xcex94Vthxcfx84 for the TFT.
A method of evaluating the reliability of a TFT according to a third aspect of the invention in a TFT having a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film evaluates the reliability of the TFT in the xe2x88x92BT stress state in which the gate is supplied with a predetermined negative constant voltage VG and maintained at an arbitrary constant temperature T using the following expressions:
xcex94Vthxe2x88x9dtxcex1xe2x80x83xe2x80x83(3a)
                              Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          ∝                  exp          ⁢                      xe2x80x83                    ⁢                      (                          -                                                                    xe2x80x83                                    ⁢                                      q                    ⁢                                          xe2x80x83                                        ⁢                    φ                    ⁢                                          xe2x80x83                                        ⁢                    E                                                  kT                                      )                                              (5b)                                          Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          =                  Δ          ⁢                      xe2x80x83                    ⁢                                                    V                th0                            ⁡                              (                                  t                                      t                    0                                                  )                                      α                    ⁢                      exp            ⁡                          (                              -                                                                            xe2x80x83                                        ⁢                                          q                      ⁢                                              xe2x80x83                                            ⁢                                              φ                        E                                                                              kT                                            )                                                          (6c)                                τ        =                                                            t                0                            ⁡                              (                                                      Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                                              th                        ⁢                                                  xe2x80x83                                                ⁢                        τ                                                                                                  Δ                    ⁢                                          xe2x80x83                                        ⁢                                          V                      th0                                                                      )                                      β                    ⁢          exp          ⁢                                                    xe2x80x83                            ⁢                              β                ⁢                                  xe2x80x83                                ⁢                q                ⁢                                  xe2x80x83                                ⁢                                  φ                  E                                                      kT                                              (8c)            
where xcex94Vth represents a threshold voltage shift amount for the TFT, t time, xcex1 time coefficient, k Boltzmann constant, xcfx86E temperature coefficient, and xcex94Vthxcfx84 tolerant threshold voltage shift amount for the TFT, and xcex2=1/xcex1. The method includes a step of determining time coefficient xcex1 in expression (3a) based on the relation between threshold voltage shift amount xcex94Vth obtained from at least one xe2x88x92BT stress test and time t, a step of determining temperature coefficient xcfx86E in expression (5b) based on the relation between threshold voltage shift amounts xcex94Vth obtained from at least two xe2x88x92BT stress tests and applied different temperatures T, and a step of determining a constant of proportion given as follows using the determined time coefficient xcex1 and temperature coefficient xcfx86E in expression (6c) obtained from the relation between expressions (3a) and (5b),       Δ    ⁢          xe2x80x83        ⁢                            V          th0                ⁡                  (                      1                          t              0                                )                    α        ≡      C    2  
and the method is characterized in that the life of the TFT is produced from expression (8c) obtained by modifying expression (6c) from the determined constant of proportion c2 and tolerant threshold voltage shift amount xcfx86Vth"Egr" for the TFT.
A TFT according to a fourth aspect of the invention is used for an SRAM memory cells includes a channel layer of a silicon thin film and a gate insulating film of a silicon oxide film, and is characterized in that the threshold voltage is shifted in advance toward positive voltage by the amount by which the threshold voltage is expected to shift toward negative voltage by a burn-in test.
A TFT according to a fifth aspect of the invention is operated by gate voltage VG and used under the condition that the temperature at the time of operation is an absolute temperature T and includes a channel layer of a silicon thin film, and a gate insulating film of a silicon oxide film. The gate insulating film has a thickness of tox=qd|VG|/2kT, wherein tox represents the thickness of the gate insulating film, q elementary electric charge, d voltage coefficient, and k Boltzmann constant, and voltage coefficient d is determined using the following expression (4a) based on the relation between threshold voltage shift amounts xcex94Vth obtained from at least two xe2x88x92BT stress tests and applied different gate voltages VG,                               Δ          ⁢                      xe2x80x83                    ⁢                      V            th                          ∝                  exp          ⁢                      xe2x80x83                    ⁢                                                    xe2x80x83                            ⁢                              qd                ⁢                                  "LeftBracketingBar"                                      V                    G                                    "RightBracketingBar"                                                                    2              ⁢                              xe2x80x83                            ⁢                              kTt                ox                                                                        (4a)            
where q represents elementary electric charge, k Boltzmann constant, and tox the thickness of the gate insulating film.
In the method of evaluating the reliability of a TFT according to the first aspect of the invention, since life expected for the TFT is evaluated from expression (8) using time coefficient xcex1, voltage coefficient d and temperature coefficient xcfx860 determined from xe2x88x92BT stress tests and expressions (3a), (4a), and (5a) the life expected for the TFT used with an arbitrary constant gate voltage VG at an arbitrary constant temperature T can readily and accurately be evaluated.
In the method of evaluating the reliability of a TFT according to the second aspect of the invention, since the TFT is limited for use at a predetermined constant temperature, life expected for the TFT can be evaluated without requiring at least two xe2x88x92BT stress tests at different temperatures T.
In the method of evaluating the reliability of a TFT according to the third aspect of the invention, since the TFT is limited for use at a predetermined constant gate voltage VG, life expected for the TFT can be evaluated without requiring at least two xe2x88x92BT stress tests at different gate voltages VG.
In the TFT according to the fourth aspect of the invention, since the threshold voltage is previously shifted toward the side of positive voltage by the amount of shift of the threshold voltage toward the side of negative voltage due to a burn-in test, a TFT for SRAM having an optimum characteristic can be provided after the burn-in test.
In the TFT according to the fifth aspect of the invention, since the gate insulating film has the thickness of Tox=qd|VG|/2kT, a TFT having a maximum life in a xe2x88x92BT stress state at arbitrary constant gate voltage VG and at an arbitrary constant temperature T can be provided.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.